Literature Collections | Rocky's Website

CIM-Based Accelerator

Mon, 01 Jan 0001 00:00:00 +0000

2022

[JSSC'22] Scalable and Programmable Neural Network Inference Accelerator Based on In-Memory Computing

[JSSC'22] DIANA: An End-to-End Hybrid Digital and Analog Neural Network SoC for the Edge

2023

[VLSI'23] A General-Purpose Compute-in-Memory Processor Combining CPU and Deep Learning with Elevated CPU Efficiency and Enhanced Data Locality

[JSSC'23] An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Block-wise Sparsity and Ping-Pong Weight Update

[ISSCC'23] 16.7 A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications

[ISSCC'23] 16.4 TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN Acceleration

[ISSCC'23] 16.1 MuITCIM: A 28nm 2.24$\mu$J/Token Attention-Token-Bit Hybrid Sparse Digital CIM-Based Accelerator for Multimodal Transformers

Design Space Exploration and Modeling for CIM

Mon, 01 Jan 0001 00:00:00 +0000

2020

[ISPASS'20] An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs

2021

[TC'21] Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators

2022

[ICCAD'22] Design Space and Memory Technology Co-Exploration for In-Memory Computing Based Machine Learning Accelerators

2023

[DAC'23] XPert: Peripheral Circuit & Neural Architecture Co-search for Area and Energy-efficient Xbar-based Computing

[arxiv'23] NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM

[ICCAD'23] Benchmarking and modeling of analog and digital SRAM in-memory computing architectures

[TCAD'23] MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures

[TCAD'23] Efficient Processing of MLPerf Mobile Workloads Using Digital Compute-In-Memory Macros